This invention relates to random access memories for electronic data processing systems, and deals more particularly with such a memory capable of handling data either in parallel fashion as multi-bit words or bytes or as individual bits.
Memories used in data processing systems are commonly structured to handle data to be stored or retrieved in the form of eight-bit, twelve-bit or other multi-bit words or bytes. Such memory structure is usually desirable since the data involved generally is of such complexity as to require numerous bits for its expression in binary form. Recently, however, data processing systems have been used in programmable controllers used to control industrial processes, machine tools, power stations and the like wherein various sensors are monitored and, from the information so obtained, various output devices are controlled in accordance with a given logic scheme programmed into the controller. In turn, in many applications of programmable controllers, many of the sensors and output devices are two-state devices, such as an electric switch, an electrical solenoid, or an hydraulic cylinder, the state of which (open or closed, energized or de-energized, etc.) may be represented by either the high or low value of a single binary data bit. In such a situation, where information concerning the status of a large number of two-state peripheral devices is to be stored, the use of a memory capable of handling only multi-bit words is inefficient either as to the usage of memory space, to time requirements or to both.
The general object of this invention is, therefore, to provide a random access memory for an electronic data processing system particularly well adapted for use in applications requiring the storage of both multi-bit words and of single bits of data representing the status of a word corresponding plurality of two-state peripheral devices. More particularly, the object of this invention is to provide such a memory which is readily conditioned by appropriate control signals to read or write data either as groups of bits handled in parallel to define multi-bit words or as individual bits each constituting, in effect, a one-bit word.
A further object of this invention is to provide a random access memory of the foregoing character which is readily implemented from standard memory chips and other standard integrated circuit components and which may be made in the form of a plug-in card usable with other similar cards to provide a total memory having a capacity readily varied to suit the particular application at hand.
Other objects and advantages of the invention will be apparent from the following description and drawings and from the claims forming a part hereof.